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Baker R.J. CMOS Circuit Design, Layout, and Simulation

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Baker R.J. CMOS Circuit Design, Layout, and Simulation
3rd edition. — Wiley-IEEE Press, 2010. — 1208 p.
The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one’s integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.
Now updated—the classic guide to CMOS circuits, from design to implementationThe Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one’s integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.
Inside, readers will continue to find the relevant and practical material that made the first two editions bestsellers. The Third Edition has been updated and includes new chapters covering the implementation of data converters and the analysis/design of feedback amplifiers The additional material makes the book even more useful as an academic text and companion for the working design engineer. Featured in this Third Edition:
In-depth coverage of both analog and digital transistor-level design techniques
Integration of the book’s material with online resources found at CMOSedu.com
Detailed discussions on the design of phase- and delay-locked loops, mixed-signal circuits, data converters, and circuit noise
Real-world process parameters, design rules, and layout examples
Hundreds of practical design examples, discussions, and end-of-chapter problems
Theory and discussions detailing the trade-offs and considerations when designing at the transistor level
The book’s accompanying Web site, CMOSedu.com, offers numerous examples for many computer-aided design (CAD) tools including Cadence, Electric, HSPICE, LASI, LTspice, Spectre, and WinSpice. Readers can recreate, modify, or simulate the design examples presented in the book. In addition, the solutions to the book’s end-of-chapter problems, the book’s figures, and additional homework problems without solutions are found at CMOSedu.com.
This Third Edition of CMOS Circuit Design, Layout, and Simulation is the ideal companion for undergraduate and graduate students in electrical and computer engineering as well as both novice and senior engineers working on transistor-level integrated circuit design.
Preface.
Introduction to CMOS Design.

The CMOS IC Design Process.
CMOS Background.
An Introduction to SPICE.
The Well.
Patterning.
Laying Out the N-well.
Resistance Calculation.
The N-well/Substrate Diode.
The RC Delay through the N-well.
Twin Well Processes.
The Metal Layers.
The Bonding Pad.
Design and Layout Using the Metal Layers.
Crosstalk and Ground Bounce.
Layout Examples.
The Active and Poly Layers.
Layout Using the Active and Poly Layers.
Connecting Wires to Poly and Active.
Electrostatic Discharge (ESD) Protection.
Resistors, Capacitors, MOSFETs.
Resistors.
Capacitors.
MOSFETs.
Layout Examples.
MOSFET Operation.
MOSFET Capacitance Overview/Review.
The Threshold Voltage.
IV Characteristics of MOSFETs.
SPICE Modeling of the MOSFET.
Short-Channel MOSFETs.
CMOS Fabrication.
CMOS Unit Processes.
CMOS Process Integration.
Backend Processes.
Electrical Noise: An Overview.
Signals.
Circuit Noise.
Discussion.
Models for Analog Design.
Long-Channel MOSFETs.
Short-Channel MOSFETs.
MOSFET Noise Modeling.
Models for Digital Design.
The Digital MOSFET Model.
The MOSFET Pass Gate.
A Final Comment Concerning Measurements.
The Inverter.
DC Characteristics.
Switching Characteristics.
Layout of the Inverter.
Sizing for Large Capacitive Loads.
Other Inverter Configurations.
Static Logic Gates.
DC Characteristics of the NAND and NOR Gates.
Layout of the NAND and NOR Gates.
Switching Characteristics.
Complex CMOS Logic Gates.
Clocked Circuits.
The CMOS TG.
Applications of the Transmission Gate.
Latches and Flip-Flops.
Examples.
Dynamic Logic Gates.
Fundamentals of Dynamic Logic.
Clocked CMOS Logic.
VLSI Layout Examples.
Chip Layout.
Layout Steps by Dean Moriarty.
Memory Circuits.
Array Architectures.
Peripheral Circuits.
Memory Cells.
Sensing Using AX Modulation.
Qualitative Discussion.
Sensing Resistive Memory.
Sensing in CMOS Imagers.
Special Purpose CMOS Circuits.
The Schmitt Trigger.
Multivibrator Circuits.
Input Buffers.
Charge Pumps (Voltage Generators).
Digital Phase-Locked Loops.
The Phase Detector.
The Voltage-Controlled Oscillator.
The Loop Filter.
System Concerns.
Delay-Locked Loops.
Some Examples.
Current Mirrors.
The Basic Current Mirror.
Cascoding the Current Mirror.
Biasing Circuits.
Amplifiers.
Gate-Drain Connected Loads.
Current Source Loads.
The Push-Pull Amplifier.
Differential Amplifiers.
The Source-Coupled Pair.
The Source Cross-Coupled Pair.
Cascode Loads (The Telescopic Diff-Amp).
Wide-Swing Differential Amplifiers.
Voltage References.
MOSFET-Resistor Voltage References.
Parasitic Diode-Based References.
Operational Amplifiers I.
The Two-Stage Op-Amp.
An Op-Amp with Output Buffer.
The Operational Transconductance Amplifier (OTA).
Gain-Enhancement.
Some Examples and Discussions.
Dynamic Analog Circuits.
The MOSFET Switch.
Fully-Differential Circuits.
Switched-Capacitor Circuits.
Circuits.
Operational Amplifiers II.
Biasing for Power and Speed.
Basic Concepts.
Basic Op-Amp Design.
Op-Amp Design Using Switched-Capacitor CMFB.
Nonlinear Analog Circuits.
Basic CMOS Comparator Design.
Adaptive Biasing.
Analog Multipliers.
Data Converter Fundamentals.
Analog Versus Discrete Time Signals.
Converting Analog Signals to Digital Signals.
Sampte-and-Hold (S/H) Characteristics.
Digital-to-Analog Converter (DAC) Specifications.
Analog-to-Digital Converter (ADC) Specifications.
Mixed-Signal Layout Issues.
Data Converter Architectures.
DAC Architectures.
ADC Architectures.
Implementing Data Converters.
R-2R Topologies for DACs.
Op-Amps in Data Converters.
Implementing ADCs.
Feedback Amplifiers.
The Feedback Equation.
Properties of Negative Feedback on Amplifier Design.
Recognizing Feedback Topologies.
The Voltage Amp (Series-Shunt Feedback).
The Transimpedance Amp (Shunt-Shunt Feedback).
The Transconductance Amp (Series-Series Feedback).
The Current Amplifier (Shunt-Series Feedback).
Stability.
Design Examples.
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